Analog Electronics - GATE practice papers - Electronics & Communication for Q. 516

Q.  What is the probability of output generation when the inputs are '1' &  '0' respectively in S-R clocked flipflop? (Marks : 02)
- Published on 19 Oct 15

a. 1,1 & output remains undefined because outputs try to become '1'
b. 1,0 & flip-flop is reset
c. 0,1 & flip-flop is set
d. 0,0 & output remains unchanged

ANSWER: 0,1 & flip-flop is set
 
Set & Reset actions of S-R clocked flipflop are performed only on the basis of a clock pulse. So, when
S=0 & R =0, outputs are 1,1 ( output remains unchanged)
S=0 & R = 1, outputs are 1,0 ( Reset action of flipflop)
S= 1 & R=0, outputs are 0,1 ( Set action of flipflop)
S= 1 & R=1, outputs are 0,0 (output remains undefined since they ought to be 1)

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