1) The mechanism of 'Bushing' specifically refers to the addition of __________ in the state diagram
a. Nodes
b. Branches
c. Loops
d. States
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Answer
Explanation
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ANSWER: Branches
Explanation:
No explanation is available for this question!
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2) How many 'D' flip flops will be required for designing the synchronous counter for the state diagram shown below?
a. 2
b. 3
c. 5
d. 7
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Answer
Explanation
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ANSWER: 3
Explanation:
No explanation is available for this question!
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3) Which among the following are the sequential circuits entering into the phenomenon of lock out condition?
a. Bush circuits
b. Bushless circuits
c. Locked circuits
d. Unlocked circuits
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Answer
Explanation
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ANSWER: Bushless circuits
Explanation:
No explanation is available for this question!
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4) From the diagram shown below, if the circuit enters into state '5', its next state will be '7'. If the circuit further enters at state'7', then what would be the desirable next state for avoiding the lock out condition?
a. 0
b. 3
c. 5
d. 7
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Answer
Explanation
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ANSWER: 0
Explanation:
No explanation is available for this question!
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5) Why is the extent of propagation delay in synchronous counter much lesser than that of asynchronous counter?
a. Due to clocking of all flip flops at the same instant
b. Due to increase in number of states
c. Due to absence of connection between output of preceding flip flop and clock of next one
d. Due to absence of mode control operation
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Answer
Explanation
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ANSWER: Due to clocking of all flip flops at the same instant
Explanation:
No explanation is available for this question!
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6) Which flip flops serve to be the fundamental building blocks of counters?
a. S-R flip flops
b. J-K flip flops
c. T flip flops
d. D flip flops
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Answer
Explanation
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ANSWER: T flip flops
Explanation:
No explanation is available for this question!
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7) On which factor/s does the clock pulse frequency of a counter depend/s for its reliable operation?
a. Number of flip flops
b. Width of strobe pulse
c. Propagation delay
d. All of the above
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Answer
Explanation
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ANSWER: All of the above
Explanation:
No explanation is available for this question!
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8) If the output of two-bit asynchronous binary up counter using T flip flops is '00' at reset condition, then what output will be generated after the fourth negative clock edge?
a. 00
b. 01
c. 10
d. 11
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Answer
Explanation
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ANSWER: 00
Explanation:
No explanation is available for this question!
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9) Which type of triggering phenomenon is exhibited by Counters?
a. Edge
b. Level
c. Pulse
d. All of the above
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Answer
Explanation
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ANSWER: Edge
Explanation:
No explanation is available for this question!
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10) Which sequential circuits are applicable for counting pulses?
a. Counters
b. Flip Flops
c. Registers
d. Latches
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Answer
Explanation
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ANSWER: Counters
Explanation:
No explanation is available for this question!
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