Registers - Electronic Engineering (MCQ) questions & answers

1)   When the mode control pin is connected to ground, Universal Shift Register acts as _______

a. Unidirectional register
b. Bidirectional register
c. Multi-directional register
d. None of the above
Answer  Explanation 

ANSWER: Bidirectional register

Explanation:
No explanation is available for this question!


2)   Referring to the diagram, if all inputs are loaded simultaneously and output is loaded bit by bit, then what will be the mode of operation for a shift register?

a. Serial Input Serial Output (SISO)
b. Serial Input Parallel Output (SIPO)
c. Parallel Input Serial Output (PISO)
d. Parallel Input Parallel Output ( PIPO)
Answer  Explanation 

ANSWER: Parallel Input Serial Output (PISO)

Explanation:
No explanation is available for this question!


3)   Which type of triggering is shown by the D flip flops in buffer registers for the temporary storage of digital words?

a. Positive level triggering
b. Negative level triggering
c. Positive edge triggering
d. Negative edge triggering
Answer  Explanation 

ANSWER: Negative edge triggering

Explanation:
No explanation is available for this question!


4)   Which among the following sequential logic circuits are adopted for the designing of a sequence generator?

a. Shift Registers
b. Counters
c. Both a and b
d. None of the above
Answer  Explanation 

ANSWER: Both a and b

Explanation:
No explanation is available for this question!


5)   In a sequence detector, if the required bit is at its input while checking the sequence bit by bit, the detector moves to ________

a. Previous state
b. Next state
c. Remains in the same state (present state)
d. Null state
Answer  Explanation 

ANSWER: Next state

Explanation:
No explanation is available for this question!


6)   If a complete sequence is detected, what will be the output of a sequence detector?

a. 1
b. 0
c. Both a and b
d. None of the above
Answer  Explanation 

ANSWER: 1

Explanation:
No explanation is available for this question!


7)   On the second falling edge of clock in ring counter, if the generated output of second clock pulse is ' 0100', what will be the output after the  fourth clock pulse?

a. 1000
b. 0001
c. 0010
d. 0000
Answer  Explanation 

ANSWER: 0001

Explanation:
No explanation is available for this question!


8)   For a ring counter, the number of output states are always equal to ______

a. Number of input states
b. Number of clock pulses
c. Number of registers
d. Number of flip flops
Answer  Explanation 

ANSWER: Number of flip flops

Explanation:
No explanation is available for this question!


9)   Which is the correct sequence of operations to be necessarily performed in the resistance welding application of ring counter?

a. Hold, Squeeze, Weld, Off
b. Squeeze, Hold, Weld, Off
c. Weld, Squeeze, Hold, Off
d. Off, Squeeze, Hold, Weld
Answer  Explanation 

ANSWER: Squeeze, Hold, Weld, Off

Explanation:
No explanation is available for this question!


10)   What does the data in parallel form of representation in registers, known as?

a. Temporal Code
b. Spectral Code
c. Special Code
d. Factorial Code
Answer  Explanation 

ANSWER: Special Code

Explanation:
No explanation is available for this question!