1) In Gray coding, when the state machine changes state, ______ bit/s in the state vector changes the value.
a. one
b. two
c. four
d. eight
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Answer
Explanation
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ANSWER: one
Explanation:
No explanation is available for this question!
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2) Which UART component/s divide/s the system clock to provide the bit clock with the period equal to one bit time and Bclock x 8?
a. Baud Rate Generator
b. Transmitter Section
c. Receiver Section
d. All of the above
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Answer
Explanation
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ANSWER: Baud Rate Generator
Explanation:
No explanation is available for this question!
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3) In SM chart for UART transmitter, which state/s indicate/s the waiting of sequential machine for the rising edge of bit clock and the consequent clearing of low order bit of TSR in order to transmit logic '0' for one bit time?
a. IDLE State
b. Sync State
c. Transmit_Data_State
d. All of the above
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Answer
Explanation
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ANSWER: Sync State
Explanation:
No explanation is available for this question!
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4) Which method/s is/are adopted for acquiring spike-free outputs?
a. Moore machine with clocked outputs
b. Mealy machine with clocked outputs
c. Output-state machine
d. All of the above
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Answer
Explanation
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ANSWER: All of the above
Explanation:
No explanation is available for this question!
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5) Which among the following is/are identical in Mealy & Moore machines?
a. Combinational output signal
b. Clocked Process
c. Both a and b
d. None of the above
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Answer
Explanation
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ANSWER: Clocked Process
Explanation:
No explanation is available for this question!
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6) Which among the following constraint/s is/are involved in a state-machine description?
a. State variable & clock
b. State transitions & output specifications
c. Reset condition
d. All of the above
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Answer
Explanation
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ANSWER: All of the above
Explanation:
No explanation is available for this question!
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7) Hold time is defined as the time required for the data to ________ after the triggering edge of clock.
a. Increase
b. Decrease
c. Remain stable
d. All of the above
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Answer
Explanation
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ANSWER: Remain stable
Explanation:
No explanation is available for this question!
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8) The time required for an input data to settle _____ the triggering edge of clock is known as 'Setup Time'.
a. Before
b. During
c. After
d. All of the above
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Answer
Explanation
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ANSWER: Before
Explanation:
No explanation is available for this question!
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9) The output of sequential circuit is regarded as a function of time sequence of __________.
A. Inputs
B. Outputs
C. Internal States
D. External States
a. A & D
b. A & C
c. B & D
d. B & C
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Answer
Explanation
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ANSWER: A & C
Explanation:
No explanation is available for this question!
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10) Which type of digital systems exhibit the necessity for the existence of at least one feedback path from output to input?
a. Combinational System
b. Sequential system
c. Both a and b
d. None of the above
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Answer
Explanation
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ANSWER: Sequential system
Explanation:
No explanation is available for this question!
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