Digital Signal Processing - Electronic Engineering (MCQ) questions & answers
Dear Readers, Welcome to Digital Signal Processing multiple choice questions and answers with explanation. These objective type Digital Signal Processing questions are very important for campus placement test, semester exams, job interviews and competitive exams like GATE, IES, PSU, NET/SET/JRF, UPSC and diploma.
Specially developed for the Electronic Engineering freshers and professionals, these model questions are asked in the online technical test and interview of many companies.
These tutorial are also important for your viva in university exams like Anna university, Pune, VTU, UPTU, CUSAT etc.
1) Which peripheral on C 6 X processor allows buffering of serial samples in memory by port automatically & especially with an assistance of EDMA controller?
- Published on 27 Nov 15
a. Boot Loader
b. HPI
c. EMIF
d. McBSP
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2) In C6X processor, which external device/s get/s acquire/s an interface support by EMIF peripheral?
- Published on 27 Nov 15
a. Synchronous burst
b. Asynchronous devices
c. Externally shared memory devices
d. All of the above
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3) In TMS 320 C6x processor architecture, which operation/s is/are performed by 'M' functional unit?
- Published on 27 Nov 15
a. Bit expansion
b. Bit interleaving & deinterleaving
c. Rotation & Variable shifting
d. All of the above
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4) In TMS 320 C6x processor architecture, which functional unit is adopted for transferring the data from register to and from control register?
- Published on 27 Nov 15
a. L2
b. M2
c. S2
d. D2
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5) In DSP Processor, what kind of queuing is undertaken/executed through instruction register and instruction cache?
- Published on 27 Nov 15
a. Implicate
b. Explicate
c. Both a and b
d. None of the above
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6) Program Sequence plays a crucial role in maintaining the track of ___________
- Published on 27 Nov 15
a. Program counter increment
b. Conditional branching & looping
c. Subroutine & interrupt handling
d. All of the above
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7) How is the sampling rate conversion achieved by factor I/D?
- Published on 27 Nov 15
a. By increase in the sampling rate with (I)
b. By filtering the sequence to remove unwanted images of spectra of original signal
c. By decimation of filtered signal with factor D
d. All of the above
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8) In polyphase filter, which kind of realization is/are adopted for three subfilters possessing coefficients?
- Published on 27 Nov 15
a. Cascade
b. Parallel
c. Direct
d. All of the above
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9) How is the operating level of sampling rate for the subfilters involved in the polyphase filters?
- Published on 27 Nov 15
a. Low
b. Moderate
c. High
d. None of the above
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10) In polyphase filters, the subfilters which share a common delay line results in the reduction of the storage requirement by factor ______
- Published on 27 Nov 15
a. 1
b. 2
c. 3
d. 4
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