OPTION & INTCON Registers in Data Memory - MCQs with answers

OPTION & INTCON Registers in Data Memory - MCQs with answers


1. Which bit of OPTION register has a potential to decide the falling or rising edge sensitivity for the external interrupt INT?

a. RBPU
b. INTEDG
c. PSA
d. RTS

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ANSWER: b. INTEDG



2. Where are the prescalar assignments applied with a usage of PSA bit?

a. Only RTCC
b. Only Watchdog timer
c. Either RTCC or Watchdog timer
d. Neither RTCC nor Watchdog timer

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ANSWER: c. Either RTCC or Watchdog timer



3. Where is the exact specified location of an interrupt flag associated with analog-to-digital converter ?

a. INTCON
b. ADCON0
c. ADRES
d. PCLATH

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ANSWER: b. ADCON0



4. Which bit permits to enable (if set) or disable (if cleared) all the interrupts in an INTCON register?

a. GIE
b. ADIE
c. RBIE
d. TOIE

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ANSWER: a. GIE


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